
Ethernet Physical Layer
Slave Controller – Technology I-29
5.10.3 MI Protocol
Each MI access begins with a Preamble of “Ones“(32 without preamble suppression, less if both ESC
and PHY support preamble suppression), followed by a Start-of-Frame (01) and the Operation Code
(01 for write and 10 for read operations). Then the PHY address (5 bits) and the PHY register address
(5 bits) are transmitted to the PHY. After a Turnaround (10 for write and Z0 for read operations – Z
means MDIO is high impedance), two bytes of data follow. The transfer finishes after the second data
byte and at least one IDLE cycle.
5.10.4 Timing specifications
Table 18: MII Management Interface timing characteristics
1 0 1
1 0
0
MDC
MDIO
t
Clk
A4 A2A4 A1 R4A0 R3 R2
Preamble PHY Address
D7 D5D6 D4 D2D3 D1 D0
High Data Byte Low Data Byte
MDC
MDIO
t
Write
Start OP code
R1 R0
PHY Register Address
Turnaround
D15 D13D14 D12 D10D11 D9 D8
t
Write
IDLE
Figure 8: Write access
0
1 1 00
MDC
MDIO
t
Clk
A4 A2A4 A1 R4A0 R3 R2
Preamble PHY Address
D7 D5D6 D4 D2D3 D1 D0
High Data Byte Low Data Byte
MDC
MDIO
t
Read
Start OP code
R1 R0
PHY Register Address
Turn-
around
D15 D13D14 D12 D10D11 D9 D8
t
Read
IDLE
Figure 9: Read access
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